Vector processors consume high amounts of power due to the wide data path width. A normal vector unit can only be turned ON or OFF in its entirety. Such a normal vector unit wastes power when executing smaller data width operations. This invention specifies a method to turn on and off a portion of the vector data path on the fly.
Power consumption may be minimized by dividing the vector data path width into smaller vector lanes. For example, a 256 bit vector data path may be divided into thirty-two 8-bit vector lanes. One or more up to all 32 of these vector lanes may be enabled for any particular instruction. There must be some manner of setting the number and identity of the vector lanes powered for any particular instruction.
Totsuka, U.S. Patent Application Publication No. 2006/0155964 published Jul. 13, 2006, teaches one prior art manner of identifying the vector lanes powered. Totsuka teaches a register stores data having one bit corresponding to each of the vector lanes of the vector data path. For each vector lane, 0 in the corresponding register location turns OFF power to that vector lane. A 1 in the corresponding register location turns ON power to that vector lane. Thus unused vector lanes may be powered OFF during a particular instruction operation saving power.